Microprocessor with operation capture facility
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United States of America Patent
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Oct 3, 1995
Issued Date -
N/A
app pub date -
Apr 22, 1992
filing date -
Jul 5, 1991
priority date (Note) -
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status (Latency Note)
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Abstract
The present invention provides a microprocessor with a special Operation Capture Facility (OCF) mechanism which enables 'faulting' whenever there is (a) a memory access request to any one of a specified plurality of blocks of memory (b) a request to access any one of a plurality of specified I-O ports or (c) any one of a specified plurality of interrupts is activated. This OCF mechanism includes a plurality of special registers which store either (a) an I-O port address, (b) a memory address or (c) an interrupt number. Mask registers are provided which (1) mask bits in the special register, thereby providing the ability to fault on an entire block of I-O access requests or upon activation of any one of a block of interrupts and (2) indicate which type of interrupts should be faulted and to indicate whether I-O should be faulted on a byte, word or double word.
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