Element placement method and apparatus

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United States of America Patent

PATENT NO 5465218
SERIAL NO

08194389

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Abstract

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An LSI element placement method of placing elements in accordance with an order in which branches are arranged, each branch being constituted by an element array included in a circuit diagram having first and second terminals, the method including a partial circuit extraction step of sequentially extracting data of a predetermined number of branches included in the circuit diagram from the first terminal side of the circuit diagram so as to overlap the data by a predetermined number, and an element placement step of performing an element placement operation based on a genetic algorithm in the extracted partial circuit data, thereby generating an element placement result including placement coordinate data of all elements included in the partial circuit data.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA72-34 HORIKAWA-CHO SAIWAI-KU KAWASAKI-SHI KANAGAWA 2120013 ?2120013

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Handa, Keiichi Kawasaki, JP 8 140

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