Direct memory access controller handling exceptions during transferring multiple bytes in parallel
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Nov 7, 1995
Grant Date -
N/A
app pub date -
Jan 30, 1992
filing date -
Jan 30, 1992
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A direct memory access controller (DMAC) is provided to transfer bytes from arbitrary offset byte boundaries while performing data check operations in parallel to the movement of data in parallel through the DMA controller. The DMA controller moves data during each memory cycle and validates the moved data at the destination memory during the writing of bytes to the destination address.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully