Shared memory array for data block and control program storage in disk drive
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United States of America Patent
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-
Nov 7, 1995
Grant Date -
N/A
app pub date -
Apr 30, 1993
filing date -
Apr 30, 1993
priority date (Note) -
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status (Latency Note)
Importance
Abstract
An improved disk drive architecture includes a microcontroller interface circuit connected between a drive microcontroller and a buffer controller. The microcontroller interface circuit includes address mapping registers for mapping at least one predetermined portion of directly addressable memory of the microcontroller to address locations of the drive's cache buffer. The buffer controller circuit includes an access arbitration circuit for arbitrating requests for access to the cache buffer by the drive's data sequencer, the drive's host interface controller and the drive's microcontroller. A microcontroller wait state generator responds to the access arbitration circuit by generating and applying a wait state sequence to the microcontroller until a request it makes for access to the cache buffer can be executed.
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