Integrated circuit package having a multilayered wiring portion formed on an insulating substrate
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United States of America Patent
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-
Nov 21, 1995
Issued Date -
N/A
app pub date -
Dec 30, 1994
filing date -
Jun 10, 1991
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An integrated circuit package in which three conductor columns for connecting an insulating substrate and an integrated circuit are connected in parallel for use as I/O vias. Thereby, the conductor columns in a multilayer wiring portion between an integrated circuit and an insulating substrate is prevented from disconnecting.
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