Hierarchically connectable configurable cellular array
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United States of America Patent
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Nov 21, 1995
Grant Date -
N/A
app pub date -
Nov 5, 1993
filing date -
Nov 5, 1992
priority date (Note) -
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Abstract
An field programmable gate array (FPGA) of cells arranged in rows and columns is interconnected by a hierarchical routing structure. Switches separate the cells into blocks and into blocks of blocks with routing lines interconnecting the switches to form the hierarchy. Also, select units for allowing memory bits to be addressed both individually and in large and arbitrary groups are disclosed. Further a control store for configuring the FPGA is addressed as an SRAM and can be dynamically reconfigured during operation.
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