Fault tolerant active matrix display device

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United States of America Patent

PATENT NO 5469025
SERIAL NO

08408183

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Abstract

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An active matrix display device which includes a first and a second insulating substrates, a gate bus an adjacent gate bus, and a source bus arranged on the first substrate, a pixel electrode in a segment enclosed by the gate and the source buses, a switching element connected to the pixel electrode, the gate bus and the source bus, wherein the source bus comprises a projection extending toward the pixel electrode so as to be electrically disconnected therefrom, and the adjacent gate bus comprises a projection extending toward the pixel electrode, the source bus being overlaid on the adjacent gate bus projection with an insulating layer sandwiched therebetween, the adjacent gate bus projection being provided with an electroconductive member at the top thereof with an insulating layer sandwiched therebetween, the electroconductive member being electrically connected to the pixel electrode, and electrically disconnected from the source bus projection.

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Patent Owner(s)

Patent OwnerAddress
SHARP KABUSHIKI KAISHA1 TAKUMI-CHO SAKAI-KU SAKAI CITY OSAKA 5908522 ?5908522

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fujihara, Toshiaki Tenri, JP 21 426
Fujiki, Hiroshi Sakai, JP 40 529
Irie, Katsumi Gojo, JP 12 234
Kanemori, Yuzuru Tenri, JP 32 1059
Katayama, Mikio Ikoma, JP 92 3208
Kato, Hiroaki Nara, JP 216 3745
Kondo, Naofumi Nara, JP 28 792
Marumoto, Hideji Kitakatsuragi, JP 4 89
Mitsumoto, Kazuyori Tenri, JP 12 173
Nakazawa, Kiyoshi Fujiidera, JP 22 499
Negoto, Hidenori Ikoma, JP 13 360
Okamoto, Masaya Nara, JP 133 1687
Otsu, Kumiko Osaka, JP 2 62
Yano, Kozo Yamatokoriyama, JP 20 204

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