Self-aligned via structure

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United States of America Patent

PATENT NO 5471094
SERIAL NO

08201437

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Abstract

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A self-aligned via between interconnect layers in an integrated circuit allows a less precise masking alignment to be used to fabricate an integrated circuit with increased packing density and improved yield. In one embodiment, self-aligned vias are used to connect first and second interconnect layers in an SRAM memory cell.

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Patent Owner(s)

Patent OwnerAddress
INTEGRATED DEVICE TECHNOLOGY INC6024 SILVER CREEK VALLEY ROAD SAN JOSE CA 95138

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lien, Chuen-Der Mountain View, CA 153 2742

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