Multi-processor with crossbar link of processors and memories and method of operation
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United States of America Patent
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Nov 28, 1995
Issued Date -
N/A
app pub date -
Jun 21, 1994
filing date -
Nov 17, 1989
priority date (Note) -
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Abstract
There is disclosed a multiprocessor system and method arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. A crossbar switch serves to establish the processor memory links and the entire image processor, including the individual processors, the crossbar switch and the memories, are contained on a single silicon chip.
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