Media error code generation as for a video inverse transport processor
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United States of America Patent
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-
Dec 12, 1995
Grant Date -
N/A
app pub date -
Apr 22, 1994
filing date -
Apr 22, 1994
priority date (Note) -
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status (Latency Note)
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Abstract
In an inverse transport processor of the type which directs video payloads of a packet signal to buffer memory space, apparatus is included for writing a media error codes at sequential first memory address locations in the memory ahead of each packet payload. Concurrently a processor examines the current packet to determine if it occurs in proper sequence. If a packet is lost, the payload is written to memory in subsequent sequential address locations. If there is no packet loss, the sequential first memory address locations are simply overwritten by the packet payload to excise the undesired media error code. Media error codes can thus be inserted in the packet payload stream without creating timing obstacles, for a system designer.
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