Microprocessor implementing single-step or sequential microcode execution while in test mode
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United States of America Patent
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Dec 12, 1995
Issued Date -
N/A
app pub date -
Sep 28, 1993
filing date -
Jun 1, 1989
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A microprocessor having a test mode wherein a test instruction including an instruction for executing the whole microprogram routine and a step-execution instruction for executing only one microinstruction of an arbitrary address in a micro ROM for easily diagnosing each internal function blocks by independently operating them, and a circuit for changing the content of sequence field of the microinstruction outputted to the microsequencer at executing the step-instruction. The circuit is used for executing the microprogram routine step by step with combining instructions which execute only one microinstruction, or a specified instruction between two continuous microinstructions of a microprogram routine, so that the cause of fault points in the microprocessor can be easily specified.
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