Method for programming a single EPROM or FLASH memory cell to store multiple levels of data that utilizes a floating substrate

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United States of America Patent

PATENT NO 5477485
SERIAL NO

08392087

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Abstract

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Multiple logic levels can be programmed into a single EPROM or FLASH memory cell by applying one of a corresponding number of programming voltages to the control gate of a memory cell that is biased so that the source-to-substrate junction becomes forward-biased and the drain-to-substrate junction becomes reverse-biased. During programming, the bias conditions form substrate hot electrons which, in addition to the channel hot electrons, accumulate on the floating gate. By utilizing the substrate hot electrons, a much lower control gate voltage can be utilized during programming. More importantly, however, once the channel hot electrons cease to exist, the substrate hot electrons and holes converge to a stable charge that is related to the control gate voltage used during programming and the programmed threshold voltage of the cell.

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Patent Owner(s)

Patent OwnerAddress
NATIONAL SEMICONDUCTOR CORPORATION12500 TI BOULEVARD M/S 3999 DALLAS TX 75243

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bergemont, Albert Palo Alto, CA 146 3011
Chi, Min-Hwa Palo Alto, CA 301 5484

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