Coherent multiplexer controller
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United States of America Patent
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-
Jan 2, 1996
Grant Date -
N/A
app pub date -
Jul 20, 1993
filing date -
Jul 20, 1993
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A control circuit for a multiplexer includes two inverters, and exclusive-NOR gate, and a d-type flip-flop. The multiplexer has two input terminals and two selection terminals, and the control circuit has two input terminals. One of the two inverters is connected in circuit between one of the two control circuit input terminals and one of the two multiplexer input terminals; the d-type flip-flop is coupled to the two multiplexer selection terminals; the exclusive-NOR gate is connected in circuit between the two control circuit input terminals and two of three input terminals of the d-type flip-flop; and the second inverter is connected in circuit between the exclusive-NOR gate and one of the three input terminals of the d-type flip-flop.
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