Debris-reducing telephone resistor combination and method
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United States of America Patent
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Jan 2, 1996
Grant Date -
N/A
app pub date -
May 10, 1994
filing date -
May 10, 1994
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A telephone resistor combination and method, that is formed by a ceramic substrate having a resistive film on it, and pins on one edge of the substrate and connected to the film. A U-shaped cold region is provided on the substrate around at least much of the film, and is so constructed that application of common high overload voltages to the pins causes vertical fracture of the substrate. The resulting substrate pieces are held by the pins to the circuit board.
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Cited Art Landscape
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