Three-dimensionally integrated nonvolatile SRAM cell and process
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United States of America Patent
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Jan 30, 1996
Grant Date -
N/A
app pub date -
Apr 29, 1994
filing date -
Apr 29, 1994
priority date (Note) -
Expired
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Abstract
A nonvolatile SRAM cell (20) includes a six-transistor SRAM cell portion (22) and a three-transistor nonvolatile memory portion (30). The nonvolatile memory portion (30) is connected to one storage node (101) of the SRAM cell portion (22). The nonvolatile SRAM cell (20) is three-dimensionally integrated in four layers of polysilicon. The nonvolatile memory portion (30) includes a thin film memory cell (32) having an oxide-nitride-oxide structure (41), and is programmable with a relatively low programming voltage. The three-dimensional integration of the nonvolatile SRAM cell (20) and relatively low programming voltage results in lower power consumption and smaller cell size.
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