Non-disruptive, randomly addressable memory system
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United States of America Patent
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Jan 30, 1996
Issued Date -
N/A
app pub date -
Aug 25, 1994
filing date -
Jul 2, 1992
priority date (Note) -
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Abstract
An apparatus and method for reprogramming a reconfigurable-logic array is provided whereby a portion of the array can be reconfigured without disrupting the operation of the entire array. Avoiding total disruption of array operation typically requires that the configuration control signals, which determine the configuration of the array, remain substantially non-disrupted during a reprogramming operation. In one embodiment, the reprogramming operates by unique decoding in which an electrical path is established only between the particular storage elements being reprogrammed, thereby avoiding disruption of the configuration control signals provided by other storage elements. In other embodiments, buffers and/or read-modify-write techniques are used to minimize disruption of configuration control signals of storage elements not being reprogrammed.
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