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Abstract

A digital signature built-in-test (BIT) device for testing a digital circuit includes circuitry for compressing test data received from the digital circuit. The test data compressing circuitry may include one or more linear feedback shift registers (LFSR), which compresses the test data and supplies a signature data word corresponding to the test data compressed. Circuitry for enabling the test data compressing circuitry for a predetermined period of time is also included. The enabling circuitry provides an enabling signal to the test data compressing circuitry. The signature data word from the test data compressing circuitry is stored in a buffer memory circuit. Control data is received by the digital signature BIT device from a remote processor. The control data is received and processed by a control circuit, which circuit supplies control signals to the test data compressing circuitry, signature data word storing circuitry and the enabling circuitry.

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First Claim