Method of die burn-in

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United States of America Patent

PATENT NO 5489538
SERIAL NO

08370565

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention provides for a burn-in test which is conducted on the wafer level, before the dies are separated into individual chips and packaged. In a preferred embodiment of the invention, a series of chips are each connected to an external current, ground, and/or alternate signal source(s) for burn-in. Generally, the method herein for a burn-in of a semiconductor die comprises the step of: (a) providing an electrical connection between a die on a semiconductor wafer and an external current source; (b) heating the semiconductor wafer; and (c) applying a common signal across the electrical connection to burn in the die. A preferred method herein provides a semiconductor wafer including a multiplicity of dies and wafer level test points, at least one layer of conductive lines overlying the semiconductor wafer, a means for connecting an individual conductive line to a test point on the wafer; and a means for connecting the conductive lines to an external signal source for exercising the dies.

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Patent Owner(s)

Patent OwnerAddress
LSI LOGIC CORPORATIONSANTA CLARA CA 95051

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dell'Oca, Conrad Palo Alto, CA 1 84
Rostoker, Michael D San Jose, CA 204 14387

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