Surface mount chip package having an array of solder ball contacts arranged in a circle and conductive pin contacts arranged outside the circular array
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United States of America Patent
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Feb 6, 1996
Grant Date -
N/A
app pub date -
Dec 22, 1993
filing date -
Dec 22, 1993
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An electrical device for logic circuits having a package comprising a combination of controlled collapse electrical interconnections, such as solder balls and pin through-hole conductors, wherein the conductors are disposed outside the perimeter of an inter-array of solder balls, which when a maximum number of solder balls are disposed, the array is circular in shape, so as to provide an increased footprint for the electrical device beyond that, otherwise maximum footprint for solder balls alone, which footprint is otherwise limited in size due to failures which occur in solder balls when solder balls are exposed to thermal and mechanical stress levels at extended distances from the neutral or zero stress point of the array.
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