Loop scheduler

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United States of America Patent

PATENT NO 5491823
SERIAL NO

08186268

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Abstract

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A loop scheduler in a software compiler system for generating a schedule for executing in a target computer loops of instructions contained in a computer program is described. The loop scheduler operates by searching for an optimal loop schedule for executing a particular instruction loop in the target computer. The loop scheduler then identifies loop overhead instructions and non-loop overhead instructions in the particular instruction loop. A replicated loop schedule is generated by the loop scheduler by replicating the non-loop overhead instructions in the loop schedule by a replication factor such that overlap of each operation instance in the optimal loop schedule with itself is prevented. The loop scheduler inserts the loop overhead instructions into the replicated loop schedule to generate a modified loop schedule, and then allocates registers of the target computer to the modified loop schedule.

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Patent Owner(s)

Patent OwnerAddress
RPX CORPORATION4 EMBARCADERO SUITE 4000 SAN FRANCISCO CA 94111

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ruttenberg, John C Waban, MA 10 963

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