Importance

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Abstract

An integrated circuit has a plurality of interface pins and includes a first circuit block that is comprised of a plurality of gate-equivalent circuits; the first circuit block being a first partition of a data processing system. The integrated circuit further includes at least one other circuit block comprised of a plurality of gate-equivalent circuits; the second circuit block being a second partition of the data processing system. The first and second circuit blocks are capable of operating independently of one another, with each performing an associated function. At least one mode select interface pin is provided, in conjunction with gating circuitry that is interposed between the first and second circuit blocks and the interface pins for selectively coupling, in accordance with a logic level applied to the at least one mode select interface pin, only one of the circuit blocks to the interface pins. A method of specifying a gate array integrated circuit to include a plurality of independently operating circuit blocks is also disclosed.

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First Claim