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Abstract

Defects in the manufacturing of IC devices are analyzed by testing the devices for defects, generating a serial digital data bitstream upon which the test result for each device is encoded in succession, and operating upon the data bitstream to analyze the device defects. This allows for the use of rapid and reliable digital signal processing techniques to perform the analysis. The types of analyses that can be performed include the determination of non-random yields to distinguish random from systematic defects, comparisons with signature defect patterns that correspond to various systematic faults, and yield predictions for other circuits manufactured with a similar process but having a different critical circuit area. An improved windowing technique is used to determine non-random defects, in which normalized defect counts are obtained and compared for various window sizes. Multiple functional and parametric tests for each device can be accommodated in several ways, including the assignment of additional data bits in the bitstream to the additional tests. The defect analysis can be performed in real-time on one batch while the next batch is being processed, with the results of the analysis used to correct the manufacturing process if systematic defects are identified. An improved method is also described for calculating the non-random yield loss factor Y.sub.o, which can be used in yield models for yield prediction purposes.

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