Method and apparatus for testing integrated circuit devices
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United States of America Patent
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Mar 19, 1996
Issued Date -
N/A
app pub date -
Jul 20, 1994
filing date -
Nov 1, 1991
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A relatively large number of test fixtures are provided for an available tester. The tester is programmed to access the individual test fixtures independently, and does so only when the devices connected to them are to be tested. When the test fixtures are not in such a test mode, local power sources provided for each fixture are used to apply stress voltages to the devices being tested. This frees the tester from the requirement for providing stressing voltages to the devices, allowing it to be efficiently used to perform testing on a larger number of devices concurrently.
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