Sampling circuit for analog signals

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United States of America Patent

PATENT NO 5506525
SERIAL NO

07916123

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Abstract

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A sampling circuit which obtains a level of sampled-and-held signal which is determined with respect to a well-determined reference level V0, even though the input signal is a useful signal referenced with respect to a low-stability reference level. This is the case in particular for sampling of signals derived from charge-transfer photosensitive devices for which the dark level can vary. The circuit includes a sample-and-hold device (EB1) and an input via a capacitor (C1), with a reset circuit which periodically charges the capacitor (C1) to a value which is roughly the difference between the (variable) input reference level and the (fixed) output reference level. According to the invention, it is provided that the reset circuit comprises a looped amplifier (AD1) in which the loop (B1, EB2, B2) is designed to introduce a voltage level shift equal to the shift introduced intrinsically by the sample-and-hold device (B1, EB1, B2).

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Patent Owner(s)

Patent OwnerAddress
THOMSON COMPOSANTS MILITAIRES ET SPATIAUX75008 PARIS

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Debroux, Jean-francois St. Etienne de St. Geoins, FR 8 83

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