Method and apparatus for performing frequency acquisition in all digital phase lock loop
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United States of America Patent
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Apr 9, 1996
Grant Date -
N/A
app pub date -
Dec 13, 1993
filing date -
Dec 13, 1993
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and apparatus for performing frequency acquisition. Frequency acquisition is accomplished by utilizing binary-search techniques with a controller (13), variable digital oscillator (16), frequency detector (11) an incrementor (19) and decrementor (21) and control registers (22). The frequency detector (11) generates an output indicating the relative speed of the variable oscillator (16) with reference to a externally provided signal. Depending on the output of the frequency detector (11 ), the arithmetic logic circuitry (19, 21) will increase or decrease the value in a control register (22), resulting in a corresponding increase or decrease in speed of the variable oscillator (16). The magnitude of changes to the control register (22) is gradually reduced as the steps of frequency detection and arithmetic updates are repeated until the variable oscillator (16) has reached the proper frequency.
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