Process for synchronizing the scanning circuit of an image display device
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United States of America Patent
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Apr 23, 1996
Grant Date -
N/A
app pub date -
May 18, 1994
filing date -
Nov 20, 1991
priority date (Note) -
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Abstract
A process for synchronizing a scanning circuit of a device for the display of images acquired by a camera having a scanning circuit controlled by a given acquisition clock. The device comprises an input buffer, a processor making it possible to reconstitute each image entering the buffer, a display store in which the images are recorded after processing and a controller able to control the reading or writing of the images in the display store. The process is characterized in that it consists of applying to the scanning circuit an arbitrary clock signal independent of the image synchronization of the signal received. Also, the reading and writing of the display store is controlled in order to obtain repetitions or suppressions of images on display thus absorbing any delay or advance. Further, the processor should have a faster than necessary image compression (average time of one image).
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