Method and apparatus for managing concurrent access to multiple memories
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United States of America Patent
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Apr 23, 1996
Issued Date -
N/A
app pub date -
Sep 27, 1994
filing date -
Nov 15, 1990
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A memory apparatus includes a circuit for receiving and serially storing a plurality of instructions and a plurality of buffer memories each including a buffer controller for regulating access to that buffer. Also included is a circuit, connected to each buffer controller and the receiving circuit, for accessing one or more of said buffers in response to a first serially stored instruction while, in response to at least one other serially stored instruction, concurrently accessing at least one remaining buffer.
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