Semiconductor device having multi-level interconnection structure
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United States of America Patent
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May 7, 1996
Grant Date -
N/A
app pub date -
Dec 27, 1994
filing date -
Dec 27, 1993
priority date (Note) -
Expired
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Abstract
A semiconductor device comprises a silicon via-plug within a fine via-hole in direct contact with an inner wall of the via-hole. A metal silicide layer is formed between an interconnection layer and the silicon plug as well as between the silicon plug and a diffused layer formed in a substrate. Shape defects and excessive stresses formed within a fine via-hole are reduced because the via-hole is filled with the silicon plug substantially without a metallic film or a metal silicide film on a sidewall. The metal silicide film is formed by a heat treatment through silicidation reaction.
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