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Abstract

This invention discloses a high-slew-rate CMOS operational amplifier. This operational amplifier has a differential input stage formed by first and second transistors of the NMOS type connected together source-to-source and a first constant-current source. The first constant-current source is formed by an NMOS transistor coupled to the sources of the first and second transistors. The gates of third, fourth, and fifth transistors are respectively fed V.sub.in+, V.sub.in-, and the source voltage of the first and second transistors. A second constant-current source, formed by a PMOS transistor, applies a bias current to the sources of the third, fourth, and fifth transistors. In the steady state (i.e., V.sub.in+ =V.sub.in -), all the bias current from the second constant-current source flows into the fifth transistor. As a result, the third and fourth transistors are cut off, whereupon the differential input stage is biased by a given bias-current from the first constant-current source. If V.sub.in+ rises higher than V.sub.in-, this increases the source voltage of the first and second transistors. As a result, the fifth transistor is cut off, and the bias current of the second constant-current source comes to flow into the fourth transistor. A current proportional to the current flowing in the fourth transistor is added by a current mirror circuit of plural NMOS transistors to the current of the first constant-current source, whereupon the bias current of the differential input stage is increased.

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First Claim