Direct memory access (DMA) controller with programmable bus release period for timing DMA transfers
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United States of America Patent
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May 14, 1996
Grant Date -
N/A
app pub date -
Feb 28, 1995
filing date -
Mar 10, 1994
priority date (Note) -
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Abstract
The present invention relates to an image data transfer controller. In the present invention, transfer processing for acquiring a right to control a bus and performing DMA transfer of image data corresponding to a set number of data to be continuously transferred and bus release processing for releasing the acquired right to control a bus during a set bus release period are repeatedly performed until a predetermined number of image data are transferred. The set value of the number of data to be continuously transferred and the set value of the bus release period are changed on the basis of the state of a request to use the bus.
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