Importance

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Abstract

A recording apparatus includes a plurality of recording elements a plurality of drive ICs, in which a plurality of drive signal lines containing a signal line for an image data signal and a signal line for a transfer clock which transfers the image data signal are connected in cascade. Each drive IC supplies a recording current selectively to the recording elements in correspondence to the image data signal. A transfer clock control circuit, which is located at an input part of the transfer clock in the recording apparatus, controls a duty of the transfer clock supplied to the drive ICs so that a duty ratio of the transfer clock at the final stage of the plurality of drive ICs is enough to transfer the image data signal.

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First Claim