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Abstract

A method for programming a programmable logic device (FPLD) to implement a circuit design using a library of elements made up of general logic functions and an invert function. The general logic functions represent groups of the 2.sup.2.spsp.n specific logic functions which can be stored in an n-input lookup table addressing 2.sup.n data signals. The specific logic functions of each group differ by one or more inverted input signals and/or an inverted output signal. The method includes the step of technology mapping the circuit design using the library of elements. The general logic functions are assigned a finite value and the invert function is assigned a zero cost (or a very small cost). A subcircuit of the circuit design having n input signals (or less) and one output will always match one logic element from this library.

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First Claim