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Abstract

A non-volatile semiconductor memory device having a plurality of electrically rewritable memory cells for storing multi-value data. The cells are arranged in an array and are coupled to a plurality of bit lines which transmit and receive data to and from the memory cells. The device also includes a plurality of sense amplifiers for sensing and amplifying the potentials of the bit lines; a plurality of data latches forming data to be written in the memory cells; a plurality of verify circuits for checking whether the data is correctly written in the memory cells and a plurality of switches. The switches control the connections of the sense amplifiers, data latches and verify circuits to the bit lines. Write control devices set the potentials of the bit lines in accordance with the contents of the data latches. The switches are set in an open state after data is read from the memory cells onto the bit lines and the sense amplifiers almost simultaneously operate after the switches are set in an open state to sense and amplify the data read onto the bit lines.

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First Claim