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Abstract

A cell assembly device switches and assembles synchronous digital channels into asynchronous transfer mode cells supporting asynchronous logical channels. The cells are sent on asynchronous multiplex links, and the synchronous digital channels are conveyed by synchronous multiplex links organized into recurrent frames. Samples of each synchronous digital channel are represented by binary words placed in time slots occupying fixed positions in the frames. The cell assembly device includes: an input memory for storing the samples of all the synchronous digital channels of each frame as the samples are received; cell formation memories which supply cells to the asynchronous multiplex links; a cell identifier memory for storing information for each cell; a marking memory containing a link list containing the information necessary for switching of the synchronous digital channels to the asynchronous logical channels; and a control circuit for transmitting octets from the input memory into one of the cell formation memories, and for transmitting a header from the cell identifier memory into one of the cell formation memories, at write addresses supplied by the cell identifier memory.

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First Claim