Semiconductor integrated device having parallel signal lines
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United States of America Patent
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-
Jun 4, 1996
Issued Date -
N/A
app pub date -
Sep 25, 1995
filing date -
Nov 24, 1992
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
For taking a characteristic impedance matching of signal transmission lines in a package which carries thereon a semiconductor chip with a very high-speed LSI formed thereon, there is provided a semiconductor integrated circuit device wherein one ends of signal transmission lines formed on a main surface of a package substrate are extended up to the position just under pads formed on a main surface of the semiconductor chip and are connected to the pads on the chip electrically through bump electrodes, while opposite ends of the signal transmission lines are extended to the outer peripheral portion of the main surface of the package substrate and outer leads are bonded thereto.
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