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Abstract

Disclosed is a novel ferroelectric-semiconductor interface memory element for a dual-valued, capacitive memory diode of an integrated circuit which consists of a layer of metal electrode, a layer of diffusion barrier conductor, a layer of ferroelectric material, a layer of semiconductor crystal, and a layer of metal electrode. Also disclosed is an alternative, novel, ferroelectric-semiconductor interface memory element for a dual-valued, capacitive memory diode of an integrated circuit which consists of a layer of metal electrode, a layer of diffusion barrier conductor, a layer of ferroelectric material, another layer of diffusion barrier conductor, a layer of semiconductor crystal, and a layer of metal electrode. The two values of maximum capacitance in a single capacitor are achieved in these capacitive diodes by making use of accumulation, depletion, or inversion of semiconductor surface charges as a result of the orientation of the remnant polarization of ferroelectric in proximity.

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First Claim