Semiconductor chip assemblies and components with pressure contact
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United States of America Patent
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Jun 11, 1996
Issued Date -
N/A
app pub date -
Nov 3, 1994
filing date -
Mar 26, 1993
priority date (Note) -
In Force
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Abstract
A semiconduct chip assembly includes a chip, terminals permanently electrically connected to the chip by flexible leads and a resilient element or elements for biasing the terminals away from the chip. The chip is permanently engaged with a substrate having contact pads so that the terminals are disposed between the chip and the substrate and the terminals engage the contact pads under the influence of the force applied by the resilient element. The terminals typically are provided on a flexible sheet-like dielectric interposer and the resilient element is disposed between the interposer and the chip. The assembly of the chip and the terminals can be tested prior to engagement with the substrate. Because engagement of this assembly with the substrate does not involve soldering or other complex bonding processes, it is reliable. The assembly can be extremely compact and may occupy an area only slightly larger than the area of the chip itself.
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- 15 United States
- 10 France
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- 2 Other
Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| TESSERA INC | SAN JOSE AOZHUO PARK ROAD NO 3025 OF THE STATE OF CALIFORNIA SAN JOSE CALIFORNIA |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Grube, Gary | Monroe, NY | 8 | 438 |
| Khandros, Igor | Peekskill, NY | 4 | 167 |
| Mathieu, Gaetan | Carmel, NY | 16 | 995 |
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| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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