Importance

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Abstract

An integrated circuit device for comparing the state of a large number of inputs (i.e. 'discretes') against any one of a plurality of selectable voltage levels. The compared data is examined in a 3.times.3 matrix format. In a redundant mode, comparators are utilized in a triple-redundant configuration to obtain a consensus on input states, at three successive time intervals, raising a flag when consensus fails. Inputs, whether in a redundant or non-redundant mode are distributed along three different sides of a rectangular-shaped substrate to prevent catastrophic mechanical failures. In the redundant mode, discretes are compared using a voting technique such that when all three levels are the same, an error free status is provided, whereas a two-out-of-three vote is interpreted as correct but with an indication that the discrete being monitored requires further checking. Data, fault and self-test results are made available to the outside world by a serial transmitter and in parallel form by discrete output terminals. Output data is compared with data inputted for further assuring integrity of the device. Output data is selectable in either an eight bit or sixteen bit tri-state port, which is addressable for channel data, status, bounds, mismatch, built-in self-test and major fault information.

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First Claim