Manufacturing dual sided wire bonded integrated circuit chip packages using offset wire bonds and support block cavities
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United States of America Patent
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Jun 18, 1996
Grant Date -
N/A
app pub date -
Jun 28, 1994
filing date -
Jun 28, 1994
priority date (Note) -
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Abstract
A method is disclosed for constructing a dual-sided chip package onto a leadframe having a die pad and a set of lead fingers corresponding to the die pad. Integrated circuit dies are disposed onto each side of the die pad while the leadframe is supported with support blocks having cavities that accept the integrated circuit dies and that support each lead finger and that provide clearance for stitch bonds of the previously formed wire bonds. Thereafter, a one step plastic mold is formed around each assembly comprising the dual integrated circuit dies, the die pads, and the wire bonds.
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