Thin film chip capacitor for electrical noise reduction in integrated circuits

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United States of America Patent

PATENT NO 5528083
SERIAL NO

08317900

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An integrated circuit chip and flat capacitor assembly are connected with short bonding wires to reduce electrical noise. A flat chip capacitor is coupled to the chip and includes a first electrode, a second electrode and a dielectric layer disposed between the electrodes. The ground and power bonding pads of an integrated circuit chip are coupled to a number of terminals arranged in a row near the outer edge of the capacitor, where each of the terminals is coupled to one of the electrodes. The terminals of the capacitor are connected to a number of package leads of a lead frame or a other integrated circuit package. The invention includes embodiments in which the chip is placed on top of the capacitor, the capacitor is placed on top of the chip, and a flex circuit of a micro ball grid array is placed on a capacitor which is positioned on a chip.

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Patent Owner(s)

Patent OwnerAddress
SUN MICROSYSTEMS INC4150 NETWORK CIRCLE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bogatin, Eric L San Jose, CA 5 113
Malladi, Deviprasad Campbell, CA 24 694
Zand, Bahram Laguna Niguel, CA 1 85

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