Bus system with cache snooping signals having a turnaround time between agents driving the bus for keeping the bus from floating for an extended period
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United States of America Patent
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Jun 18, 1996
Grant Date -
N/A
app pub date -
Dec 24, 1992
filing date -
Dec 24, 1992
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Abstract
A Peripheral Component Interconnect (PCI) bus for component level interconnection of processors, peripherals and memories. The PCI bus is a physical interconnect apparatus intended for use between highly integrated peripheral controller components and processor/memory systems. The PCI bus is intended as a standard interface at the component level in much the same way that ISA, EISA, or Micro Channel.TM. buses are standard interfaces at the board level. Just as ISA, EISA, and Micro Channel.TM. buses provide a common I/O board interface across different platforms and different processor generations, the PCI bus is intended to be a common I/O component interface across different platforms and different processor generations. The PCI bus lends itself to use as a main memory bus, and can be used with various cache memory techniques.
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