Wiring forming method

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5529955
SERIAL NO

08296022

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An insulating layer 6 is formed covering a lower level wiring layer 5. Contact hole 11 registered with the lower level wiring 5 is then formed in the insulating layer 6. An adhesion layer 12 is formed on the lower level wiring layer 5 and a whole surface of the third level insulating layer 6. Then, a tungsten layer 13 is formed on the adhesion layer 12. The whole surface of the tungsten layer 13 is etched back until a small hollow gap is formed at the upper end portion of the contact hole 11, to leave the tungsten layer 13 only in the inside of the contact hole 11. Thereafter, an Al alloy layer is reflow-sputtered on the whole surface of the insulating layer 6 and the inside of the contact holes at a comparatively low temperature to form an upper level wiring layer 15. The surface unevenness produced in etch-back process can be planarized. A wiring having a good coverage, a good quality of layer, and a flat surface can be formed.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
YAMAHA CORPORATIONHAMAMATSU-SHI SHIZUOKA-KEN 430-8650

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hibino, Satoshi Hamamatsu, JP 20 221
Kuwajima, Tetsuya Hamamatsu, JP 6 74

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation