Method and apparatus for processing interruption
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United States of America Patent
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Jun 25, 1996
Grant Date -
N/A
app pub date -
Aug 2, 1993
filing date -
Oct 2, 1992
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Shadow registers for processing interruption are provided in a CPU. When the control shifts to interruption routine, the shadow registers are used for the interruption routine by changing the use of ordinary registers thereto, and the ordinary registers are prohibited to be used during a period of the interruption. Subsequently to the finish of the interruption, the ordinary registers are re-used without the necessity of the store and the re-store of the ordinary registers.
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