Self-clocking pipeline register
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United States of America Patent
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-
Jul 9, 1996
Grant Date -
N/A
app pub date -
Apr 21, 1995
filing date -
Apr 21, 1995
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A control module for controlling a data register, a self-clocking data register controlled by such a module and a pipeline of self-clocked pipeline registers. The localized control module includes a flip-flop for indicating whether the data register being controlled is occupied or vacant. Each module includes state machine logic for generating an enable output to the pipeline register when the flip-flop indicates the register was vacant and a load signal indicating data is available for loading into the register has been received. The localized control may be further modified to provide look-ahead in which an enable output is also generated when a load signal has been received and an unload signal has been received.
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