Importance

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Abstract

Test jig apparatus for testing an integrated circuit chip that suppresses build-up and subsequent discharge of electrical charge on the test jig apparatus or on the chip. The test jig apparatus includes a base of selected material having a top surface of the same general shape and dimensions as the chip to be tested. Preferably, the entire top surface of the base is electrically grounded. The base has two or more side surfaces with side surface planes that are approximately perpendicular to a plane defining the top surface of the base. Each side surface accepts a side plate, made of a selected material such as ULTIM, that can be attached to or removed from the base. The side plate material resists electrical charge buildup and subsequent discharge so that the chip being tested is not subjected to electrical discharge from this source. In another embodiment, the side plates are replaced by plates mounted on the top surface of the base.

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First Claim