Antifuse-based FPGA architecture without high-voltage isolation transistors
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United States of America Patent
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Jul 16, 1996
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N/A
app pub date -
Sep 30, 1994
filing date -
Sep 30, 1994
priority date (Note) -
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Abstract
A programmable interface for selectively making connections between an output node of a logic module and an interconnection array in a field programmable gate array integrated circuit includes a first antifuse having a first electrode electrically connected to the output node and a second electrode connected to the first electrode of a second a second antifuse. The second electrode or the second antifuse is connected to the interconnection array. A high-voltage transistor, capable of withstanding programming voltages used in the integrated circuit to program the antifuses, is connected between the common connection comprising the second electrode of the first antifuse and the first electrode of the second antifuse and a fixed voltage potential such as ground. A control element of the high-voltage transistor is connected to circuitry for programming antifuses.
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