Multi-CPU system having fault monitoring facility

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United States of America Patent

PATENT NO 5537535
SERIAL NO

08216141

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Abstract

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A multi-CPU system including a fault monitoring facility comprises a plurality of central processing units interconnected through a system bus and sending and receiving data through a plurality of bus interface units inserted in the system bus. A fault monitoring bus in parallel with the system bus is commonly accessed by the bus interface units. A bus interface unit which detects a fault notifies the other bus interface units simultaneously using the fault monitoring bus. Data-originating interface units and data-destination interface units receive fault information of the location and type of fault, which has occurred. Swift recovery from a faulty state is enabled.

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Patent Owner(s)

Patent OwnerAddress
FUJITSU LIMITEDKAWASAKI-SHI KANAGAWA 211-8588

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Maruyama, Takumi Kawasaki, JP 21 95
Sugita, Kiyoshi Kawasaki, JP 11 154
Yoshida, Mitsunobu Kawasaki, JP 104 960

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