Method and apparatus for storing control information in multi-bit non-volatile memory arrays
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jul 30, 1996
Grant Date -
N/A
app pub date -
Dec 27, 1994
filing date -
Dec 27, 1994
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A memory array circuit including a plurality of non-volatile memory cells adapted to selectively store data in either single bit mode or a multi-bit mode, control circuitry for causing control information data to be stored in first preselected ones of the plurality of cells and other data to be stored in other preselected ones of the plurality of cells, and circuitry for accessing the plurality of cells to read, program and erase the cells, the accessing circuitry functioning to access cells for storing control information data in single bit mode and cells for storing other data in either single bit or multi-bit mode.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully