
US Patent No: 5,543,732
Number of patents in Portfolio can not be more than 2000
Programmable logic array devices with interconnect lines of various lengths
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Aug 6, 1996
Issued date -
May 17, 1995
filing date -
08/442,832
serial no -
In Force
status
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Abstract
A programmable logic array device has a plurality of logic regions and conductors for conveying signals between the logic regions. Conductors of several different lengths are provided so that most connections between logic regions can be made using conductors which are close to the length required and not wastefully much longer than that length.
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First Claim
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International Classification(s)
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Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
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| 4,609,986 Programmable logic array device using EPROM technology | 324 | 1984 | |
| 4,677,318 Programmable logic storage element for programmable logic devices | 232 | 1985 | |
| 4,713,792 Programmable macrocell using eprom or eeprom transistors for architecture control in programmable logic circuits | 220 | 1985 | |
| 4,774,421 Programmable logic array device using EPROM technology | 168 | 1986 | |
| 4,871,930 Programmable logic device with array blocks connected via programmable interconnect | 304 | 1988 | |
| 4,899,067 Programmable logic devices with spare circuits for use in replacing defective circuits | 231 | 1988 | |
| 4,912,342 Programmable logic device with array blocks with programmable clocking | 250 | 1989 | |
| 5,121,006 Registered logic macrocell with product term allocation and adjacent product term stealing | 235 | 1991 | |
| 5,260,610 Programmable logic element interconnections for programmable logic array integrated circuits | 391 | 1991 | |
| 5,220,214 Registered logic macrocell with product term allocation and adjacent product term stealing | 137 | 1992 | |
| 5,260,611 Programmable logic array having local and long distance conductors | 412 | 1992 | |
| 5,350,954 Macrocell with flexible product term allocation | 199 | 1993 | |
| 5,371,422 Programmable logic device having multiplexers and demultiplexers randomly connected to global conductors for interconnections between logic elements | 208 | 1993 | |
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| 4,758,745 User programmable integrated circuit interconnect architecture and test method | 441 | 1986 | |
| 5,073,729 Segmented routing architecture | 123 | 1990 | |
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| 4,642,487 Special interconnect for configurable logic array | 396 | 1984 | |
| RE34363 Configurable electrical circuit having configurable logic elements and configurable interconnects | 546 | 1991 | |
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| 4,617,479 Programmable logic array device using EPROM technology | 317 | 1984 | |
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| 5,218,240 Programmable logic cell and array with bus repeaters | 83 | 1992 | |
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| 5,467,029 OR array architecture for a programmable logic device | 43 | 1993 | |
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| 2002/0186,837 Multiple prime number generation using a parallel prime number search algorithm | 2001 | ||
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| 5,255,203 Interconnect structure for programmable logic device | 80 | 1990 | |
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| 5,208,491 Field programmable gate array | 348 | 1992 | |
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