Fault tolerant interconnect topology using multiple rings
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United States of America Patent
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Aug 6, 1996
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N/A
app pub date -
Jul 13, 1994
filing date -
Jul 13, 1994
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Abstract
An interconnect topology providing enhanced fault tolerance to a multi-component data processing system. The topology utilizes a plurality of rings for interconnecting multiple system components, or cards, at least two of which are indirectly connected so that communication therebetween is through a third component. Each of the system components is coupled to a set of at least two different rings and includes interface circuits for routing data and a bridge for permitting data to be transferred between the at least two rings.
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